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I.S. EN 60191-6-4:2003

Current

Current

The latest, up-to-date edition.

MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-4: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGES - MEASURING METHODS FOR PACKAGE DIMENSIONS OF BALL GRID ARRAY (BGA)

Available format(s)

Hardcopy , PDF

Language(s)

English

Published date

01-01-2003

For Harmonized Standards, check the EU site to confirm that the Standard is cited in the Official Journal.

Only cited Standards give presumption of conformance to New Approach Directives/Regulations.


Dates of withdrawal of national standards are available from NSAI.

€59.00
Excluding VAT

FOREWORD
1 Scope
2 Normative references
3 Terms and definitions
4 Reference character and drawings
  4.1 Ball grid array package (BGA) Type 1 - Ball datum
  4.2 Ball grid array package (BGA) Type 2 - Body datum
5 Measuring method
  5.1 Datum S pertaining to ball coplanarity
  5.2 Datum A, B
  5.3 Definition of specified dimensions and measuring
       method
  5.4 Profile of a package edge surface v
  5.5 Mounting height A
  5.6 First stand-off A1
  5.7 Second stand-off A4
  5.8 Ball diameter b
  5.9 Ball center position X
  5.10 Ball coplanarity y
  5.11 Package top flatness y1
Annex ZA: Normative references to international publications
          with their corresponding European publications

Includes requirements for the measuring methods of ball grid array (BGA) dimensions.

DevelopmentNote
For CENELEC adoptions of IEC publications, please check www.iec.ch to be sure that you have any corrigenda that may apply. (01/2017)
DocumentType
Standard
Pages
28
PublisherName
National Standards Authority of Ireland
Status
Current

Standards Relationship
IEC 60191-6-4:2003 Identical
BS EN 60191-6-4:2003 Identical
NF EN 60191-6-4 : 2003 Identical
DIN EN 60191-6-4:2004-01 Identical
NBN EN 60191-6-4 : 2004 Identical
SN EN 60191-6-4 : 2003 Identical
EN 60191-6-4:2003 Identical

IEC 60191-6:2009 Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages

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