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IEC 60191-6-20:2010

Current

Current

The latest, up-to-date edition.

Mechanical standardization of semiconductor devices - Part 6-20: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Measuring methods for package dimensions of small outline J-lead packages (SOJ)

Available format(s)

Hardcopy , PDF , PDF 3 Users , PDF 5 Users , PDF 9 Users

Language(s)

English, English - French

Published date

30-08-2010

€41.59
Excluding VAT

FOREWORD
1 Scope
2 Normative references
3 Terms and definitions
4 Measuring methods

IEC 60191-6-20:2010 specifies methods to measure package dimensions of small outline J-lead-packages (SOJ), package outline form E in accordance with IEC 60191-4.

Committee
TC 47/SC 47D
DevelopmentNote
Stability Date: 2020. (09/2017)
DocumentType
Standard
Pages
26
PublisherName
International Electrotechnical Committee
Status
Current

EN IEC 60191-1:2018 Mechanical standardization of semiconductor devices - Part 1: General rules for the preparation of outline drawings of discrete devices
I.S. EN IEC 60191-1:2018 MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 1: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF DISCRETE DEVICES
IEC 60191-1:2018 Mechanical standardization of semiconductor devices - Part 1: General rules for the preparation of outline drawings of discrete devices

IEC 60191-6:2009 Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages
IEC 60191-4:2013 Mechanical standardization of semiconductor devices - Part 4: Coding system and classification into forms of package outlines for semiconductor device packages

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