I.S. EN 60191-6-17:2011
Current
The latest, up-to-date edition.
MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-17: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGES - DESIGN GUIDE FOR STACKED PACKAGES - FINE-PITCH BALL GRID ARRAY AND FINE-PITCH LAND GRID ARRAY (P-PFBGA AND P-PFLGA)
Hardcopy , PDF
English
01-01-2011
For Harmonized Standards, check the EU site to confirm that the Standard is cited in the Official Journal.
Only cited Standards give presumption of conformance to New Approach Directives/Regulations.
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FOREWORD
INTRODUCTION
1 Scope
2 Normative references
3 Definitions
4 Terminal position numbering
5 Drawings
6 Dimensions
7 Dimension table
Annex ZA (normative) - Normative references to
international publications with their
corresponding European publications
Gives outline drawings and dimensions for stacked packages and individual stackable packages in the form of FBGA or FLGA.
| DevelopmentNote |
For CENELEC adoptions of IEC publications, please check www.iec.ch to be sure that you have any corrigenda that may apply. (01/2017)
|
| DocumentType |
Standard
|
| Pages |
33
|
| PublisherName |
National Standards Authority of Ireland
|
| Status |
Current
|
| Standards | Relationship |
| EN 60191-6-17:2011 | Identical |
| IEC 60191-6-17:2011 | Identical |
| IEC 60191-6:2009 | Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages |
| IEC 60191-6-5:2001 | Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch ball grid array (FBGA) |
| EN 60191-6:2009 | Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages |
| EN 60191-6-5:2001 | Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch ball grid array (FBGA) |
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