IPC 7094 : 0
Superseded
A superseded Standard is one, which is fully replaced by another Standard, which is a new edition of the same Standard.
View Superseded by
DESIGN AND ASSEMBLY PROCESS IMPLEMENTATION FOR FLIP CHIP AND DIE SIZE COMPONENTS
Hardcopy
13-09-2023
English
14-02-2018
1 SCOPE
2 APPLICABLE DOCUMENTS
3 REQUIREMENTS AND TECHNOLOGY OVERVIEW
4 FLIP CHIP TECHNOLOGY
5 FLIP CHIP POST FABRICATION PROCESSING
6 FLIP CHIP INTERCONNECTING SUBSTRATES
7 PACKAGE LEVEL STANDARDIZATION
8 SYSTEM LEVEL ISSUES
9 FLIP CHIP AND DIE SIZE DEVICE ASSEMBLY
10 REQUIREMENTS FOR BOARD AND MODULE
LEVEL RELIABILITY
11 RELIABILITY PREDICTION MODELING
12 VALIDATION AND QUALIFICATION TESTING
13 SUPPLY CHAIN ISSUES
APPENDIX A - Glossary
APPENDIX B - Acronyms
Specifies the design and assembly challenges for implementing flip chip technology in a direct chip attach (DCA) assembly.
Committee |
5-20
|
DevelopmentNote |
Supersedes J STD 012. (01/2015) Included in the IPC C 1000 Collection. (05/2016)
|
DocumentType |
Standard
|
Pages |
92
|
PublisherName |
Institute of Printed Circuits
|
Status |
Superseded
|
SupersededBy | |
Supersedes |
IPC AJ 820 : A | ASSEMBLY AND JOINING HANDBOOK |
IPC 2221 GERMAN : B | GENERIC STANDARD ON PRINTED BOARD DESIGN |
IPC 7092 : 0 | DESIGN AND ASSEMBLY PROCESS IMPLEMENTATION FOR EMBEDDED COMPONENTS |
IPC 7095 : C | DESIGN AND ASSEMBLY PROCESS IMPLEMENTATION FOR BGAS |
IPC 2221B:2012 | GENERIC STANDARD ON PRINTED BOARD DESIGN |
IPC 2221 FRENCH : B2012 | GENERIC STANDARD ON PRINTED BOARD DESIGN |
IPC T 50 : M | TERMS AND DEFINITIONS FOR INTERCONNECTING AND PACKAGING ELECTRONIC CIRCUITS |
IPC A 610 : F | ACCEPTABILITY OF ELECTRONIC ASSEMBLIES |
IPC D 279 : 0 | DESIGN GUIDELINES FOR RELIABLE SURFACE MOUNT TECHNOLOGY PRINTED BOARD ASSEMBLIES |
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