IPC J STD 026 : 0

Withdrawn

Withdrawn A Withdrawn Standard is one, which is removed from sale, and its unique number can no longer be used. The Standard can be withdrawn and not replaced, or it can be withdrawn and replaced by a Standard with a different number.

SEMICONDUCTOR DESIGN STANDARD FOR FLIP CHIP APPLICATIONS

Available format(s):

Withdrawn date: 04-02-2018

Language(s):

Published date:

Publisher: Institute of Printed Circuits

Abstract - (Show below) - (Hide below)

Deals with semiconductor flip chip design requirements, Gives information for applications using section semiconductor substrates, materials, assembly and test procedures equal to established methods, bumping, test and handling practices. Describes electrical, thermal, and mechanical chip design parameters and methods, in addition to reliability aspects associated with these conditions and processes. Applicable to all new designs, in addition to modifications of non-flip chip designs.

General Product Information - (Show below) - (Hide below)

Development Note	Included in IPC C 106. (06/2008) Included in IPC C 1000. (08/2008) Jointly published by IPC & EIA. (01/2018)
Document Type	Standard
ISBN
Pages
Published
Publisher	Institute of Printed Circuits
Status	Withdrawn

Standards Referenced By This Book - (Show below) - (Hide below)

BS EN 62258-1:2010	Semiconductor die products Procurement and use
I.S. EN 62258-1:2010	SEMICONDUCTOR DIE PRODUCTS - PART 1: PROCUREMENT AND USE
EN 62258-1:2010	Semiconductor die products - Part 1: Procurement and use
IPC SM 784 : 0	GUIDELINES FOR CHIP-ON-BOARD TECHNOLOGY IMPLEMENTATION
IPC J STD 013 : 0	IMPLEMENTATION OF BALL GRID ARRAY AND OTHER HIGH DENSITY TECHNOLOGY
IPC J STD 012 : 0	IMPLEMENTATION OF FLIP CHIP AND CHIP SCALE TECHNOLOGY
IPC J STD 027 : 0	MECHANICAL OUTLINE STANDARD FOR FLIP CHIP AND CHIP SIZE CONFIGURATIONS
IPC J STD 028 : 0	PERFORMANCE STANDARD FOR CONSTRUCTION OF FLIP CHIP AND CHIP SCALE BUMPS
IEC 62258-1:2009	Semiconductor die products - Part 1: Procurement and use
CEI EN 62258-1 : 2011	SEMICONDUCTOR DIE PRODUCTS - PART 1: PROCUREMENT AND USE

Standards Referencing This Book - (Show below) - (Hide below)

IPC 2220 : LATEST	IPC 2220 FAMILY OF DESIGN DOCUMENTS
IPC SM 784 : 0	GUIDELINES FOR CHIP-ON-BOARD TECHNOLOGY IMPLEMENTATION
IEC PAS 62084:1998	Implementation of flip chip and chip scale technology
IPC J STD 012 : 0	IMPLEMENTATION OF FLIP CHIP AND CHIP SCALE TECHNOLOGY
IEC PAS 62085:1998	Implementation of ball grid array and other high density technology
IPC J STD 028 : 0	PERFORMANCE STANDARD FOR CONSTRUCTION OF FLIP CHIP AND CHIP SCALE BUMPS
IPC WP 003 : 1993	CHIP MOUNTING TECHNOLOGY (CMT)

Categories associated with this Standard - (Show below) - (Hide below)

Sub-Categories associated with this Standard - (Show below) - (Hide below)

Sorry this product is not available in your region.

Add To Cart