• There are no items in your cart

IPC J STD 028 : 0

Current

Current

The latest, up-to-date edition.

PERFORMANCE STANDARD FOR CONSTRUCTION OF FLIP CHIP AND CHIP SCALE BUMPS

Available format(s)

Hardcopy

Language(s)

English

Published date

01-08-1999

Determines construction detail requirements for bumps and other terminal structures used for Flip Chip and Chip Scale carriers. Matches defined standards for differing terminations to a particular interconnection process; includes solder bumps, columns, non-melting stand-offs and conductive polymer deposits.

DevelopmentNote
Included in IPC C 103 & IPC C 1000. (08/2008) Jointly published by IPC & EIA. (01/2018)
DocumentType
Standard
Pages
60
PublisherName
Institute of Printed Circuits
Status
Current

BS EN 62258-1:2010 Semiconductor die products Procurement and use
I.S. EN 62258-1:2010 SEMICONDUCTOR DIE PRODUCTS - PART 1: PROCUREMENT AND USE
EN 62258-1:2010 Semiconductor die products - Part 1: Procurement and use
IPC SM 784 : 0 GUIDELINES FOR CHIP-ON-BOARD TECHNOLOGY IMPLEMENTATION
IPC J STD 013 : 0 IMPLEMENTATION OF BALL GRID ARRAY AND OTHER HIGH DENSITY TECHNOLOGY
PD IEC/TS 62647-1:2012 Process management for avionics. Aerospace and defence electronic systems containing lead-free solder Preparation for a lead-free control plan
IPC J STD 012 : 0 IMPLEMENTATION OF FLIP CHIP AND CHIP SCALE TECHNOLOGY
GEIA STD 0005-1 : 2012 PERFORMANCE STANDARD FOR AEROSPACE AND HIGH PERFORMANCE ELECTRONIC SYSTEMS CONTAINING LEAD-FREE SOLDER
IEC TS 62647-1:2012 Process management for avionics - Aerospace and defence electronic systems containing lead-free solder - Part 1: Preparation for a lead-free control plan
IPC J STD 027 : 0 MECHANICAL OUTLINE STANDARD FOR FLIP CHIP AND CHIP SIZE CONFIGURATIONS
IEC PAS 62647-1:2011 Process management for avionics - Aerospace and defence electronic systems containing lead-free solder - Part 1: Lead-free management
PD IEC/PAS 62647-1:2011 Process management for avionics. Aerospace and defence electronic systems containing lead-free solder Lead-free management
IPC J STD 026 : 0 SEMICONDUCTOR DESIGN STANDARD FOR FLIP CHIP APPLICATIONS
IEC 62258-1:2009 Semiconductor die products - Part 1: Procurement and use
CEI EN 62258-1 : 2011 SEMICONDUCTOR DIE PRODUCTS - PART 1: PROCUREMENT AND USE

IPC 2220 : LATEST IPC 2220 FAMILY OF DESIGN DOCUMENTS
IPC SM 784 : 0 GUIDELINES FOR CHIP-ON-BOARD TECHNOLOGY IMPLEMENTATION
IPC J STD 026 : 0 SEMICONDUCTOR DESIGN STANDARD FOR FLIP CHIP APPLICATIONS
IEC PAS 62084:1998 Implementation of flip chip and chip scale technology
IPC J STD 012 : 0 IMPLEMENTATION OF FLIP CHIP AND CHIP SCALE TECHNOLOGY
IEC PAS 62085:1998 Implementation of ball grid array and other high density technology
IPC WP 003 : 1993 CHIP MOUNTING TECHNOLOGY (CMT)

€179.64
Excluding VAT

Access your standards online with a subscription

Features

  • Simple online access to standards, technical information and regulations.

  • Critical updates of standards and customisable alerts and notifications.

  • Multi-user online standards collection: secure, flexible and cost effective.