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IPC D 317 : A1995
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DESIGN GUIDELINES FOR ELECTRONIC PACKAGING UTILIZING HIGH SPEED TECHNIQUES
01-11-2003
12-01-2013
1.0 General
1.1 Purpose
1.2 Scope
1.3 Symbology, Terms and Definitions
1.4 Units
2.0 Applicable Documents
3.0 Overview
3.1 Decision Making Process
3.2 Design Options
3.3 Mechanical Requirements
3.4 Electrical Considerations
4.0 Mechanical Considerations
4.1 Printed Board
4.2 Component Packaging
4.3 Thermal Considerations
4.4 Component Placement
5.0 Electrical Considerations
5.1 Power Distribution
5.2 Permittivity
5.3 Capacitive Versus Transmission Line Environment
5.4 Propagation Delay Time
5.5 Impedance Models
5.6 Loading Effects
5.7 Crosstalk
5.8 Signal Attenuation
5.9 Computer Simulation Program
5.10 Connectors
6.0 Performance Testing
6.1 Impedance Testing
6.2 Impedance Test Structures and Test Coupons
6.3 Stripline Impedance Test Coupon
FIGURES
1. High speed packaging design concept
2. Schematic of information, electrical power, and
enthalpy flows
3. Heat flux vs. component area
4. Component placement guideline
5. DC distribution model
6. DC power distribution system (without remote sensing)
7. Decoupling impedance model - power supply
8. Device decoupling model
9. 74SOO Typical output switching current
10. Capacitive and transmission line in current pulses
11. Fourier transform
12. Capacitor equivalent circuit
13. Impedance for 0.1 DIP and 1206 capacitors
14. Typical electrical configurations
15.
16. Capacitive loading
17.
18. Net illustrating point discontinuity waveforms
19. Addition of two pulses traveling opposite directions
20. Distributed line
21. Lumped loading
22. Short distributively loaded cluster
23. a) Lumped loaded transmission line
b) Equivalent model
24. Waveforms for a lumped capacitive load
25. Lumped transmission line
26. Radial loading
27. a) Example configuration
28. Radial line example
29. Net configuration
30. Bus configuration
31. Wired-AND configuration
32. Multiple reflections
33. Equivalent circuit example
34. Predicted driver and load waveforms for Figure 57
a) Driver b) Load
35. Induced crosstalk voltages
36. Crosstalk voltages for a line terminated at both ends
37. Drivers and receivers at a common end
38. Drivers and receivers at opposite ends
39. AC Noise immunity for selected TTL families
40.
41. Test setup for measuring conductor impedance (suitable
for receiving inspection)
TABLES
1. Copper Wire Characteristics
2. Copper Busbar Resistances/ft
3. Typical Data for Some Logic Families
APPENDICES
A. Device Characteristics
B. Material Properties
C. Tutorial
D. Circuit Board Layups
E. Bibliography
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