EN 60191-6-5:2001
Current
Current
The latest, up-to-date edition.
Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for fine-pitch ball grid array (FBGA)
Published date
22-10-2001
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FOREWORD
1 Scope
2 Normative references
3 Definitions
Annex ZA (normative) Normative references to international
publications with their corresponding European
publications
Provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch ball grid array the terminal pitch of which is less than or equal to 0,80 mm.
| Committee |
CLC/TC 47X
|
| DocumentType |
Standard
|
| PublisherName |
European Committee for Standards - Electrical
|
| Status |
Current
|
| Standards | Relationship |
| NF EN 60191-6-5 : 2002 | Identical |
| IEC 60191-6-5:2001 | Identical |
| CEI EN 60191-6-5 : 2002 | Identical |
| NBN EN 60191 6-5 : 2002 | Identical |
| PN EN 60191-6-5 : 2002 | Identical |
| NEN EN IEC 60191-6-5 : 2001 | Identical |
| UNE-EN 60191-6-5:2002 | Identical |
| BS EN 60191-6-5:2001 | Identical |
| I.S. EN 60191-6-5:2002 | Identical |
| DIN EN 60191-6-5:2002-05 | Identical |
| BS EN 60318-1:2009 | Identical |
| CEI EN 60191-6-17 : 2012 | MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-17: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGES - DESIGN GUIDE FOR STACKED PACKAGES - FINE-PITCH BALL GRID ARRAY AND FINE-PITCH LAND GRID ARRAY (P-PFBGA AND P-PFLGA) |
| BS EN 60191-6-18:2010 | Mechanical standardization of semiconductor devices General rules for the preparation of outline drawings of surface mounted semiconductor device packages. Design guide for ball grid array (BGA) |
| I.S. EN 60191-6-17:2011 | MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-17: GENERAL RULES FOR THE PREPARATION OF OUTLINE DRAWINGS OF SURFACE MOUNTED SEMICONDUCTOR DEVICE PACKAGES - DESIGN GUIDE FOR STACKED PACKAGES - FINE-PITCH BALL GRID ARRAY AND FINE-PITCH LAND GRID ARRAY (P-PFBGA AND P-PFLGA) |
| EN 60191-6-18:2010 | Mechanical standardization of semiconductor devices - Part 6-18: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for ball grid array (BGA) |
| EN 60191-6-17:2011 | Mechanical standardization of semiconductor devices - Part 6-17: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for stacked packages - Fine-pitch ball grid array and fine-pitch land grid array (P-PFBGA and P-PFLGA) |
| EN 62137:2004/corrigendum:2005 | ENVIRONMENTAL AND ENDURANCE TESTING - TEST METHODS FOR SURFACE-MOUNT BOARDS OF AREA ARRAY TYPE PACKAGES FBGA, BGA, FLGA, LGA, SON AND QFN |
| BS EN 60191-6-19:2010 | Mechanical standardization of semiconductor devices Measurement methods of the package warpage at elevated temperature and the maximum permissible warpage |
| BS EN 62137:2004 | Environmental and endurance testing. Test methods for surface-mount boards of area array type packages FBGA, BGA, FLGA, LGA, SON and QFN |
| BS EN 62137-4:2014 | Electronics assembly technology Endurance test methods for solder joint of area array type package surface mount devices |
| BS EN 60191-6-17:2011 | Mechanical standardization of semiconductor devices General rules for the preparation of outline drawings of surface mounted semiconductor device packages. Design guide for stacked packages. Fine-pitch ball grid array and fine-pitch land grid array (P-PFBGA and P-PFLGA) |
| CEI EN 60191-6-19 : 2011 | MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-19: MEASUREMENT METHODS OF THE PACKAGE WARPAGE AT ELEVATED TEMPERATURE AND THE MAXIMUM PERMISSIBLE WARPAGE |
| I.S. EN 62137:2005 | ENVIRONMENTAL AND ENDURANCE TESTING - TEST METHODS FOR SURFACE-MOUNT BOARDS OF AREA ARRAY TYPE PACKAGES FBGA, BGA, FLGA, LGA, SON AND QFN |
| I.S. EN 62137-4:2014 | ELECTRONICS ASSEMBLY TECHNOLOGY - PART 4: ENDURANCE TEST METHODS FOR SOLDER JOINT OF AREA ARRAY TYPE PACKAGE SURFACE MOUNT DEVICES |
| I.S. EN 60191-6-19:2010 | MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES - PART 6-19: MEASUREMENT METHODS OF THE PACKAGE WARPAGE AT ELEVATED TEMPERATURE AND THE MAXIMUM PERMISSIBLE WARPAGE |
| EN 60191-6-19:2010 | Mechanical standardization of semiconductor devices - Part 6-19: Measurement methods of the package warpage at elevated temperature and the maximum permissible warpage |
| EN 62137-4:2014/AC:2015 | ELECTRONICS ASSEMBLY TECHNOLOGY - PART 4: ENDURANCE TEST METHODS FOR SOLDER JOINT OF AREA ARRAY TYPE PACKAGE SURFACE MOUNT DEVICES (IEC 62137-4:2014) |
| IEC 60191-6:2009 | Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages |
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